A disappearing Service Processor (2025)

mooreds 27 points 6 comments May 30, 2026
oxide.computer · View on Hacker News

Discussion Highlights (3 comments)

Animats

Short version: "It turned out our chosen base address for the FMC (FPGA Mezzanine Card) bus had a default memory type of Normal Cached." They accidentally put an external non-memory device behind the cache. That's never going to work right, but might work some of the time.

als0

For the uninitiated, Service Processor (SP) is just another kind of Baseboard Management Controller.

indigodaddy

Harkens me back to Sun/Sparc hardware and Solaris.

Semantic search powered by Rivestack pgvector
8,961 stories · 84,430 chunks indexed