Scrying the AMD GFX1250 LLVM Tea Leaves
mfiguiere
65 points
8 comments
July 19, 2026
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Discussion Highlights (3 comments)
WithinReason
... not just implementing barriers in hardware but also full monitors, allowing the wave to be notified if a specific cache line is evicted from the L2 cache. What is this feature for? When do you need it?
majke
I'm a heavy user of NVIDIA LOP3 instruction (uint32). I wonder when AMD will finally support it well.
androiddrew
Where does someone start on kernel development for an RDNA4? Books, resources, whatever? 8 year developer just getting into to AI side of the house